Monitoring and Verification SoC Catalog

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Monitoring and Verification Catalog

Emulator and Prototyping (21)

Monitoring and Debugging (14)

Simulation and Verification (22)

In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring

A full suite of embedded monitoring IP managed by a PVT controller with standard interfaces, creates a complete subsystem dedicated to maximizing performance, optimizing power, reliability and enablin...

In-Chip Monitoring Subsystem IP for IoT

Within the Moortec embedded in-chip monitoring subsystem fabric the Process Monitor provides the means for advanced node Integrated Circuit (IC) developers to detect the process variation of core digital MOS devices.

PVT Controller (Series 4) (Sub-system for complete PVT monitoring)

The PVT Controller provides a standard digital interface to the embedded Process, Voltage and Temperature (PVT) sensing Sub-System used to increase System on Chip performance and reliability. On-chip ...

SHS is an automated hierarchical test solution for efficiently testing system-on-chips (SoCs) or designs using multiple IP/cores

The DesignWare® STAR Hierarchical System is an automated hierarchical test solution for efficiently testing system-on-chips (SoCs) or designs using multiple IP/cores, including analog/ mixed-si...

SMS is a comprehensive, integrated test, repair and diagnostics solution

The DesignWare® Self-Test and Repair (STAR) Memory System™ is a comprehensive, integrated test, repair and diagnostics solution that supports repairable or nonrepairable embedded memories across any f...

VC Functional Safety Manager

VC Functional Safety Manager provides a comprehensive tool for IP and semiconductor groups targeting functional safety certification for ISO 26262, IEC 61508 and other functional safety standards. It ...

Zebu - Fastest Power Emulator for Hardware-Software Power Verification

ZeBu® Empower delivers breakthrough performance for fast hardware-software power verification. Its performance enables multiple iterations per day with actionable power profiling in the context of...

Analog FastSPICE Platform

Foundry-certified, the AFS Platform delivers nm SPICE accuracy >5x faster than traditional SPICE and >2x faster than parallel SPICE simulators. Offering the world s fastest nm circuit verification ...

Symphony Mixed-Signal Platform

The industry s fastest and most configurable mixed-signal solution to accurately verify design functionality, connectivity, and performance across A/D interfaces at all levels of the design hierarchy ...

Tessent Embedded SDK

The Tessent Embedded Software Development Kit (ESDK) is a set of software libraries designed to be compiled and run on an embedded system within an SoC. It provides a way to configure, control, and pr...

Tessent in-life monitoring

The Tessent Embedded Analytics solution can be used to produce health and operational metrics throughout the lifecycle of an SoC. Embedded software based on the Tessent Embedded SDK can drive the Tess...

Tessent NoC Monitor

The Tessent Embedded Analytics NoC Monitor provides non-intrusive monitoring of interconnect activity across the AMBA 5 CHI (Coherent Hub Interface) network-on-chip (NoC). The NoC Monitor enables ful...

Tessent SoC debug and optimization

Tessent Embedded Analytics accelerates debug, validation, and optimization of complex multi-core SoCs. Leveraging embedded non-intrusive instrumentation such as bus monitors, NoC monitors, and CPU deb...

Tessent Static Instrumentation

The Tessent Embedded Static Instrumentation module provides a nonintrusive mechanism for code instrumentation. Software engineers can insert watchpoints in the code that trigger messages on Tessent Em...

Tessent Status Monitor

The Tessent Embedded Analytics Status Monitor provides visibility and monitoring of any circuitry within a System-on-Chip (SoC). It affords many of the benefits of a logic analyzer, but with no need t...

Veloce Emulation Systems

The Veloce verification system reduces project schedules and cost through high-performance simulation acceleration and in-circuit emulation of complex SoC designs. Veloce achieves these benefits throu...

ZSP-USB-JTAG Emulator

The ZSP-USB-JTAG emulator probe enables efficient and productive embedded software debugging. This compact and portable probe is powered by the USB port and utilizes the JTAG interface for debugging Z...

Empowering Design Quality with Harmony Trace

Harmony Trace by Arteris, the innovative Design Data Intelligence Solution for complex SoC and System-of-SoCs projects. Accelerate quality and functional safety certifications effortlessly with seamle...

FPGA-Go-ASIC Prototyping Platform

FPGA-Go-ASIC™ prototyping platform is design for customers quick software and system verification. It is integrated abundant silicon-proven IP, such as ARM CPU Sub-system, PCIe, LVDS, DDR PHY a...

Corvette-F1 N25

Corvette-F1 N25 is an Amazon FreeRTOS-qualified, Arduino-compatible and FPGA-based evaluation platform.

Display port 2.0 VIP

Display port 2.0 is the serial communication protocol developed by Video Electronics Standards Association(VESA) to support the video,audio and other data between a source device and sink device. Display port 2.0 VIP can be used to verify transmitter or Receiver device following the Display port basic protocol as defined in Display port 2.0.

NVMe-Xactor VIP Solution

NVMe-Xactor is a comprehensive VIP solution portfolio for NVMe 1.2 used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance.

OpenCAPI VIP

The SmartDV s OpenCAPI Verification IP is fully compliant with OpenCAPI Specification V3.0 and V3.1 and verifies OpenCAPI interfaces.

SD Express Card Verification IP

Truechip's SD Express Card Verification IP provides an effective & efficient way to verify the components interfacing with SD Express Interface of an ASIC/FPGA or SoC.

SimAccel FPGA-Accelerated Verification

Accelerate RTL Verification and SW Bring-up Target IPs and SoCs

NVMe controller
PCIe RC/EP IP, Repeater, Switch
Flash controller
AMBA NoCs and peripherals
M...

SimCluster GLS

Gate-Level Parallel Simulation : Reduce Time to Simulation Sign-off

SimXACT - Gate Simulation Productivity and Analysis Technology

Gate-Level X-Verification : Reduce Bring-up Time

TileLink VIP

TileLink Verification IP provides an smart way to verify the TileLink component of a SOC or a ASIC.

DEV - Virtual Platform Development and Simulation

The Imperas Developer products consist of tools, models and infrastructure components critical for the high quality, rapid development and verification of embedded software, utilizing virtual platform...

DVinsight - Correct by construction SV UVM code with a smart editor

DVinsight™ is a smart editor for creation of Universal Verification Methodology (UVM) based System Verilog (SV) Design Verification (DV) code.

Enhanced Services Controller - Performance Monitoring

The MESC_PM3X function, implemented on a Spartan II FPGA, is to extend the functionnality already available within the APC. This macro can be customized according to specific needs (application-specif...

Fault Injection Studio

Fault Injection Attacks (FIA) extract secrets, e.g. cryptographic keys, from hardware systems by injecting faults, e.g. using a laser beam to disrupt the circuit function, or increasing operating freq...

High Throughput Additive White Gaussian Noise Generator

A configurable AWGN generator that can be used as emulator of a noisy transmission channel and can support very high throughput rates up to 10 Gbps.

ISS - The Imperas Instruction Set Simulator

Instruction Set Simulator (ISS) - fast, simple, easy to use, cross software development for embedded systems The Imperas ISS is often the first simulation product used in an embedded software develop...

M*SDK - Advanced Multicore Software Development Kit

The focus of the Imperas products is to save engineering time in the development of embedded software, primarily achieved by making the engineering process significantly more efficient through the use...

Multi-domain simulation at the system-level for mixed signal behavior modeling

VisualSim Simulation Technology - heterogeneous models of computation

Performance modeling using stochastic components

In VisualSim Architect, one can model designs as stochastic processes, with library blocks and simulators supporting the same. The latency, in seconds, and throughput, measured in Mbps, gives the efficiency of the stochastic process. Designer can put into use, different use cases and get the expected output.

QuantumLeap - Virtual Platform Simulation Acceleration

QuantumLeap is a parallel simulation performance accelerator that leverages a new synchronization algorithm to provide the fastest virtual platform software execution speed available. The execution pe...

Side Channel Studio

Side-Channel Attacks (SCA) extract cryptographic keys from hardware systems by analyzing power traces or electromagnetic emission data from the target device along with the corresponding collection of...

VisualSim Explorer

VisualSim Explorer is a Web Server that enables models to be embedded in documents for viewing, simulation and analysis from within a Web Browser without any local software installation. The technolog...

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